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Pub: Conferences

*: Corresponding Authorship

  1. Dae-Hyeon Kim, Jeong-Hyun Cho, Hyunki Han, and Hyun-Sik Kim*, “A 1.8V-Input 0.2-to-1.5V-Output 2.5A 930mA/mm3 Always-Balanced Dual-Path Hybrid Buck Converter with Seamlessly All-VCR-Coverable Tri-Mode Operation,” IEEE Symposium on VLSI Technology & Circuits (VLSI-C), Accepted to be presented in June 2024.
     
  2. Jae-Hyun Kim, Yousung Park, Doyoung Kwon, Dong-Kyu Kim, Sung-Chun Park, Yongjae Lee, Jung-Bong Lee, and Hyun-Sik Kim*, “A 96.4%-Efficiency Single-Duty-Cycled Buck-Boost Converter Achieving 1.9mV Ripple and 2.1mV Mode-Change Fluctuation for Mobile OLED Displays,” IEEE Symposium on VLSI Technology & Circuits (VLSI-C), Accepted to be presented in June 2024.
     
  3. Gyu-Wan Lim, Gyu-Wan Lim, Gyeong-Gu Kang, Seunghwa Shin, Kihyun Kim, Yousung Park, Won Kim, Young-Bok Kim, Hyun-Kyu Jeon, and Hyun-Sik Kim*, “An OLED Display Driver IC Embedding -63dB CMR, 80mV/nA Sensitivity, 390pA Detectable, and Column-Parallel Pixel Current Readout for Real-Time Non-Uniformity Compensation,” IEEE Symposium on VLSI Technology & Circuits (VLSI-C), Accepted to be presented in June 2024.
     
  4. Hong-Hyun Bae, Jeong-Hyun Cho, Kihyun Kim, Seunghwa Shin, Doojin Jang, Jun-Hyeok Yang, and Hyun-Sik Kim*, “A 7V/μs-DVS Class-G Digital-Shunt-Aided Buck Voltage Regulator Achieving a 7% Dynamic-Efficiency Drop at a 600kHz DVS Occurrence Frequency in 28nm CMOS,” IEEE Custom Integrated Circuits Conference (CICC), April 2024.
     
  5. Dae-Hyeon Kim and Hyun-Sik Kim*, “A 96.9%-Peak-Efficiency Bilaterally-Symmetrical Hybrid Buck-Boost Converter Featuring Seamless Single-Mode Operation, Always-Reduced Inductor Current, and the Use of All CMOS Switches,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 146-147, Feb. 2024.
     
  6. Yong-Jin Lee, Woojin Jang, Hong-Hyun Bae, Jeong-Hyun Cho, and Hyun-Sik Kim*, “34.7A/mm2 Scalable Distributed All-Digital 6×6 Dot-LDOs Featuring Freely Linkable Current-Sharing Network: A Fine-Grained On-Chip Power Delivery Solution in 28nm CMOS,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 272-273, Feb. 2024.
     
  7. Hyunki Han, Jeong-Hyun Cho, Woojin Jang, Yousung Park, Jiho Lee, and Hyun-Sik Kim*, “A 94.1%-Efficiency Parallel-SC Hybrid Buck Converter Designed Using VCR-Aware Topology Optimizer for a 4.2A/mm2 Current-Density FoM,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 464-465, Feb. 2024.
     
  8. Jun-Gi Lee, Hong-Hyun Bae, Seunghyun Jang, and Hyun-Sik Kim*, “A Fully Integrated, Domino-Like-Buffered Analog LDO Achieving -28dB Worst-Case Power-Supply Rejection across the Frequency Spectrum from 10Hz to 1GHz with 50pF On-Chip Capacitance,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 456-457, Feb. 2024.
     
  9. Yousung Park, Gyeong-Gu Kang, Gyu-Wan Lim, Seunghwa Shin, Yong-Sung Ahn, Wonyoun Kim, and Hyun-Sik Kim*, “A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5μs Suitable for 240Hz-Frame-Rate Mobile Displays,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 432-433, Feb. 2024.
     
  10. Seunghwa Shin, Gyeong-Gu Kang, Gyu-Wan Lim, and Hyun-Sik Kim*, “A Mobile OLED Source-Driver IC featuring Ultra-Compact 3-Stage-Cascaded 10-Bit DAC and 42V/μs-Slew-Rate True-DC-Interpolative Super-OTA Buffer,” IEEE Symposium on VLSI Technology & Circuits (VLSI-C), June 2023.
     
  11. Heejun Lee, Hyunki Han, and Hyun-Sik Kim*, “A 4-to-42V Input, 95.5% Efficiency, 3.2μA-IQ, DC-DC Buck Converter Featuring a Leakage-Emulated Bootstrap Refresher and Anti-Deadlock Self-Bias Supply for Battery-Powered Automotive Uses,” IEEE Custom Integrated Circuits Conference (CICC), April 2023.
     
  12. Woojin Jang, Gyeong-Gu Kang, Yong Lim, and Hyun-Sik Kim*, “A Pipeline ADC with Negative C-assisted SC Amplifier Canceling Gain Error and Nonlinearity,” IEEE European Solid-State Circuits Conference (ESSCIRC), pp. 317-320, Sept. 2022.
     
  13. Hyunki Han, Min-Woo Ko, Jeong-Hyun Cho, Gyeong-Gu Kang, Seok-Tae Koh, Hong-Hyun Bae, and Hyun-Sik Kim*, “A Monolithic 48V-to-1V 10A Quadruple Step-Down DC-DC Converter with Hysteretic Copied On-Time 4-Phase Control and 2× Slew Rate All-Hysteretic Mode,” IEEE Symposium on VLSI Technology & Circuits (VLSI-C), pp. 182-183, June 2022.
     
  14. Hong-Hyun Bae, Jeong-Hyun Cho, Gyeong-Gu Kang, Yousung Park, and Hyun-Sik Kim*, “A 97.6%-Efficient 1-2MHz Hysteretic Buck Converter with 7V/μs DVS-Rate Enabled by Isosceles-Triangular Shunt Current Push-Pull Technique,” IEEE Symposium on VLSI Technology & Circuits (VLSI-C), pp. 194-195, June 2022.
     
  15. Jeong-Hyun Cho, Hong-Hyun Bae, Gyu-Wan Lim, Tae-Hwang Kong, Jun-Hyeok Yang, and Hyun-Sik Kim*, “A Fully-Integrated 0.9W/mm2 79.1%-Efficiency 200MHz Multi-Phase Buck Converter with Flying-Capacitor-Based Inter-Inductor Current Balancing Technique,” IEEE Symposium on VLSI Technology & Circuits (VLSI-C), pp. 196-197, June 2022.
     
  16. Gyeong-Gu Kang, Ji-Hun Lee, Se-Un Shin, Gyu-Hyeong Cho, and Hyun-Sik Kim*, “A 5.6W-Power 96.6%-Efficiency Boost-Oriented SIDO Step-Up/Down DC-DC Converter Embedding Buck Conversion with an Energy-Balancing Capacitor,” IEEE Symposium on VLSI Technology & Circuits (VLSI-C), pp. 180-181, June 2022.
     
  17. Jeong-Hyun Cho, Dong-Kyu Kim, Hong-Hyun Bae, Yong-Jin Lee, Seok-Tae Koh, Younghwan Choo, Ji-Seon Paek, and Hyun-Sik Kim*, “A 1.23W/mm2 83.7%-Efficiency 400MHz 6-Phase Fully-Integrated Buck Converter in 28nm CMOS with On-Chip Capacitor Dynamic Re-Allocation for Inter-Inductor Current Balancing and Fast DVS of 75mV/ns,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 298-299, Feb. 2022.
     
  18. Gyu-Wan Lim, Gyeong-Gu Kang, Hyunggun Ma, Moonjae Jeong, and Hyun-Sik Kim*, “A 10b Source-Driver IC with LSB-Stacked LV-to-HV-Amplify DAC Achieving 2688μm2/channel and 4.8mV DVO for Mobile OLED Displays,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 110-111, Feb. 2022. [Demo]
     
  19. Jiho Lee, Sang-Han Lee, Gyeong-Gu Kang, Jae-Hyun Kim, Gyu-Hyeong Cho, and Hyun-Sik Kim*, “A 130V Triboelectric Energy-Harvesting Interface in 180nm BCD with Scalable Multi-Chip-Stacked Bias-Flip and Daisy-Chained Synchronous Signaling Technique,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 474-475, Feb. 2022.
     
  20. Gyeong-Gu Kang, Seok-Tae Koh, Woojin Jang, Jiho Lee, Seongjoo Lee, Ohjo Kwon, Keumdong Jung, and Hyun-Sik Kim*, “A 12-Bit Mobile OLED/μLED Display Driver IC with Cascaded Loading-Free Capacitive Interpolation DAC and 6.24V/μs-Slew-Rate Buffer Amplifier,” IEEE Symposium on VLSI Circuits (VLSI-C), June 2021. [Demo]
     
  21. Ji-Hun Lee and Hyun-Sik Kim*, “An 8Ω, 5.5W, 0.006% THD+N, 2×VBAT-Swing Switched-Mode Audio Amplifier with Fully-Differential Linear Buck-Boost Topology Achieving Total Efficiency of 87%,” IEEE Symposium on VLSI Circuits (VLSI-C), June 2021.
     
  22. Jae-Young Ko, Yeunhee Huh, Min-Woo Ko, Gyeong-Gu Kang, Gyu-Hyeong Cho, and Hyun-Sik Kim*, “A 4.5V-Input 0.3-to-1.7V-Output Step-Down Always-Dual-Path DC-DC Converter Achieving 91.5%-Efficiency with 250mΩ-DCR Inductor for Low-Voltage SoCs,” IEEE Symposium on VLSI Circuits (VLSI-C), June 2021.
     
  23. Seok-Tae Koh, Ji-Hun Lee, Gyeong-Gu Kang, Hyunki Han, and Hyun-Sik Kim*, “A 5V Dynamic Class-C Paralleled Single-Stage Amplifier with Near-Zero Dead-Zone Control and Current-Redistributive Rail-to-Rail Gm-Boosting Technique,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 86-87, Feb. 2021.
     
  24. Min-Woo Ko, Hyunki Han, and Hyun-Sik Kim*, “A 90.5%-Efficiency 28.7μVRMS-Noise Bipolar-Output High Step-Up SC DC-DC Converter with Energy-Recycled Regulation and Post-Filtering for ±15V TFT-Based LAE Sensors,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 270-271, Feb. 2021.
     
  25. Young-Seok Noh, Jeong-Il Seo, Won-Jong Choi, Ji-Hwan Kim, Hoang Van Phuoc, Hyun-Sik Kim, and Sang-Gug Lee*, “A Reconfigurable DC-DC Converter for Maximum TEG Energy Harvesting in a Battery-Powered Wireless Sensor Node,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 266-267, Feb. 2021.
     
  26. Tae-Gyun Song, Dong-Kyu Kim, Jeong-Hyun Cho, Ji-Hun Lee, and Hyun-Sik Kim*, “A 50.7dB-DR Finger-Resistance Extractable Multi-Touch Sensor IC Achieving Finger-Classification Accuracy of 97.7% on 6.7-inch Capacitive Touch Screen Panel,” IEEE Symposium on VLSI Circuits (VLSI-C), June 2020.
     
  27. Ji-Hun Lee, Gyeong-Gu Kang, Min-Woo Ko, Gyu-Hyeong Cho, and Hyun-Sik Kim*, “An 8Ω, 1.4W, 0.0024% THD+N Class-D Audio Amplifier with Bridge-Tied Load Half-Side Switching Mode Achieving Low Standby Quiescent Current of 660μA,” IEEE Symposium on VLSI Circuits (VLSI-C), June 2020.
     
  28. Min-Woo Ko, Gyeong-Gu Kang, Ki-Duk Kim, Ji-Hun Lee, Seoktae Koh, Taehwang Kong, Sang-Ho Kim, Sungyong Lee, Michael Choi, Jongshin Shin, Gyu-Hyeong Cho, and Hyun-Sik Kim*, “A 96.8%-Efficiency Continuous Input/Output-Current Step-Up/Down Converter Powering Disposable IoTs with Reconfigurable Multi-Cell-Balanced Alkaline Batteries,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 204-205, Feb. 2020.
     
  29. Dong-Kyu Kim and Hyun-Sik Kim*, “A 300mA BGR-Recursive Low-Dropout Regulator Achieving 102-to-80dB PSR at Frequencies from 100Hz to 0.1MHz with Current Efficiency of 99.98%,” IEEE Symposium on VLSI Circuits (VLSI-C), pp. C132-C133, June 2019.
     
  30. Uh-Ho Shin and Hyun-Sik Kim*, “Multi-Channel Phase-Demodulation Electrical Inspector in Manufacturing Process for Flat Panel Active-Matrix Array,” International Meeting on Information Display (IMID) 2018, Aug. 2018.
     
  31. Ki-Duk Kim, Seunghyun Park, Kye-Seok Yoon, Gyeong-gu Kang, Hyun-Ki Han, Ji-Su Choi, Sangjin Lim, Hyung-Min Lee, Hyun-Sik Kim, Kwyro Lee, and Gyu-Hyeong Cho*, “A 100mK-NETD 100ms-Startup-Time 80×60 Micro-Bolometer CMOS Thermal Imager Integrated with a 0.234mm2 1.89μVrms Noise 12b Biasing DAC,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 192-193, Feb. 2018.
     
  32. Dong-Kyu Kim and Hyun-Sik Kim*, “Low-Noise High-Speed CMOS CID Readout IC,” International SoC Design Conference (ISOCC) 2017, pp. 178-179, Nov. 2017.
     
  33. Sun-Kyu Lee, Dong-Kyu Kim, and Hyun-Sik Kim*, “Fully Automatic LED Light Drive and Angle Control System for Smart-Car Applications,” IEIE Summer Conference 2017, June 2017. (Outstanding Paper Award)
     
  34. Jun-Suk Bang, Hyun-Sik Kim, Kye-Seok Yoon, Sang-Han Lee, Oh-Jo Kwon, Choong-Sun Shin, Seonki Kim, and Gyu-Hyeong Cho*, “A Load-Aware Pre-Emphasis Column Driver with 27% Settling-time Reduction in ±18% Panel-load RC Delay Variation for UHD 240Hz Flat-Panel Displays,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 212-213, Feb. 2016.
     
  35. Jun-Suk Bang, Hyun-Sik Kim, Sang-Hui Park, Ki-Duk Kim, Sung-Won Choi, Oh-Jo Kwon, and Gyu-Hyeong Cho*, “Hybrid Driver IC for Real-Time TFT Non-uniformity Compensation of Ultra High-Definition AMOLED Display,” IEEE Symposium on VLSI Circuits (VLSI-C), pp. C326-C327, June 2015.
     
  36. Jun-Suk Bang, Hyun-Sik Kim, Sang-Hui Park, Geon-Hee Kim, and Gyu-Hyeong Cho*, “A Real-time TFT Compensation through Power Line Current Sensing for High-resolution AMOLED Displays,” SID Symposium, pp. 724-727, June 2014.
     
  37. Wanyuan Qu, Jong-Pil Im, Hyun-Sik Kim, and Gyu-Hyeong Cho*, “A 0.9V 6.3μW Multistage Amplifier Driving 500pF Capacitive Load with 1.34MHz GBW,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 290-291, Feb. 2014.
     

  38. Geon-Hee Kim, Hyun-Sik Kim, Sang-Hui Park, and Gyu-Hyeong Cho*, “A Gamma-type Current-mode Digital-to-Analog Converter for AMOLED Display Driver,” International Meeting on Information Display (IMID), p. 180, Aug. 2013.
     
  39. Hyun-Sik Kim, Jun-Hyeok Yang, Sang-Hui Park, Seung-Tak Ryu, and Gyu-Hyeong Cho*, “A 5.6mV Inter-Channel DVO 10b Column-Driver IC with Mismatch-Free Switched-Capacitor Interpolation for Mobile Active-Matrix LCDs,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 392-393, Feb. 2013.
     

  40. Jun-Hyeok Yang, Sang-Hui Park, Jung-Min Choi, Hyun-Sik Kim, Chang-Byung Park, Seung-Tak Ryu, and Gyu-Hyeong Cho*, “A Highly Noise-Immune Touch Controller Using Filtered-Delta-Integration and a Charge-Interpolation Technique for 10.1-inch Capacitive Touch-Screen Panels,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 390-391, Feb. 2013.
     

  41. Jin-woo Kim, Jin-Chul Lee, Hyun-Sik Kim, Jun-Hyeok Yang, Sang-Hui Park, and Gyu-Hyeong Cho*, “An 8-bit Compact Hybrid DAC for Current-Mode Driving AMOLED Displays,” International Meeting on Information Display (IMID), pp. 477-478, Aug. 2012.
     
  42. Jun-Hyeok Yang, Sang-Hui Park, Jin-Yong Jeon, Hyun-Sik Kim, Chang-Byung Park, Jin-Chul Lee, Jin-Woo Kim, and Gyu-Hyeong Cho*, “A High-SNR Area-Efficient Readout Circuit using a Delta-Integration Method for Capacitive Touch Screen Panels,” SID Symposium, pp. 1570-1573, May 2012.
     
  43. Jun-Hyeok Yang, Jin-Yong Jeon, Hyun-Sik Kim, Sang-Hui Park, Jin-Woo Kim, Jin-Chul Lee, and Gyu-Hyeong Cho*, “A Novel Current-Mode Driving Technique for Real-Time Image Compensation in AMOLED Displays,” SID Symposium, pp. 647-650, May 2012.
     
  44. Hyun-Sik Kim, Sang-Wook Han, Jun-Hyeok Yang, Sunil Kim, Young Kim, Sangwook Kim, Dae-Kun Yoon, Jun-Su Lee, Jae-Chul Park, Younghun Sung, Seong-Deok Lee, Seung-Tak Ryu, and Gyu-Hyeong Cho*, “A Sampling-Based 128×128 Direct Photon-Counting X-Ray Image Sensor with 3 Energy Bins and Spatial Resolution of 60um/pixel,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 110-111, Feb. 2012.
     

  45. Hyun-Sik Kim, Jin-Yong Jeon, Sung-Woo Lee, Jun-Hyeok Yang, Seung-Tak Ryu, and Gyu-Hyeong Cho*, “A 0.014mm2 9b Switched-Current DAC for AMOLED Mobile Display Drivers,” IEEE International Solid-State Circuits Conference (ISSCC), pp. 316-317, Feb. 2011.
     

  46. Jun-Hyeok Yang, Seung-Chul Jung, Young-Jin Woo, Jin-Yong Jeon, Sungwoo Lee, Changbyung Park, Hyun-Sik Kim, Seung-Tak Ryu, and Gyu-Hyeong Cho*, “A Novel Readout IC with High Noise Immunity for Charge-Based Touch Screen Panels,” IEEE Custom Integrated Circuits Conference (CICC), pp. 1-4, Sept. 2010.
     
  47. Sungwoo Lee, Kiduk Kim, Kyusung Park, Changbyung Park, Byunghun Lee, Jinyong Jeon, Seungchul Jung, Junhyeok Yang, Hyun-Sik Kim, and Gyu-Hyeong Cho*, “A 10 bit Piecewise Linear Cascade Interpolation DAC with Loop Gain Ratio Control,” IEEE Custom Integrated Circuits Conference (CICC), pp. 1-4, Sept. 2010.
     
  48. Sungwoo Lee, Ki-Duk Kim, Kyu-Sung Park, Chang-Byung Park, Byung-Hun Lee, Jin-Yong Jeon, Seung-Chul Jung, Jin Huh, Jun-Hyeok Yang, Hyun-Sik Kim, and Gyu-Hyeong Cho*, “A 10 Bits Modified VCC Interpolation and DVO Correction by Drain Current Injection,” SID Symposium, pp. 58-61, May 2010.

     
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